Recently, we proposed and analyzed the acceleration of parity measurement cycle in repetition cat qubits as a means to drastically improve its error correction performance. This acceleration includes two ingredients. The first ingredient consists in accelerating the CNOT gate, which decreases the fidelity of the gate but improves the overall performance of the code. The second ingredient relies on an asymmetric architecture, where we assume that the typical dissipative rates (both of the stabilization, and of the typical decoherence) of the ancilla cat qubits can be made larger than those of the data cat qubits. We find that this scheme achieves close-to-optimal performance of the repetition code, leading to high values of the phase-flip threshold.
Study asymmetry ideas in the context of biased noise qubits and 2D codes like (rectangular surface code, XZZX, ).
The focus will be towards biased-noise tailored codes that have some bit-flip error correction capability. In this case, one needs to keep in mind that the measurement of Z-stabilizers would require CZ or CNOT gates with data qubits as control ones. The data qubits are thus necessarily affected by the non-adiabatic errors and as such one cannot rely on fast low-fidelity gates for Z-stabilizer measurements. It should however be possible to rely on two time scales, one fast for X-stabilizer measurements as they need to compete with high-rate Z errors, and one slow for Z-stabilizers competing with rare X errors.
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